The present invention relates generally to semiconductor chip packages, and more particularly, to a flip chip ball grid array (FCBGA) package having reduced warpage and enhanced structural strength.
Ball grid array (BGA) is an advanced type of integrated circuit packaging technology which is characterized by the use of a substrate whose upper surface is mounted with a semiconductor chip and whose lower surface is mounted with a grid array of solder balls. During a surface mount technology process, for example, the BGA package can be mechanically bonded and electrically coupled to a printed circuit board (PCB) by means of these solder balls.
Flip chip ball grid array is a more advanced type of BGA technology that uses flip chip technology in mounting the active side of the chip in an upside-down manner over the substrate and bonded to the same by means of a plurality of solder bumps attached to input/output pads thereon. Due to the inherent coefficient of thermal expansion mismatches between the chip and the FCBGA package components such as for example the substrate and underfill (an adhesive flowed between the chip and substrate), high package warpage and thermal stresses are frequently induced in the FCBGA package.
These high thermal stresses and warpage not only lead to the delamination in the low-k interconnect layer(s) in the chip, but also cause solder bump cracks leading to failure, degrading the long term operating reliability of the FCBGA package. One method of reducing the warpage of the FCGBG package is to attach a stiffener inside the package. However, even with the use of the stiffener inside the package, the package will still suffer warpage to some degree.
For these reasons and other reasons that will become apparent upon reading the following detailed description, there is a need for an improved FCBGA package that addresses the above-discussed issues.